Layout Design Engineer
Company: VirtualVocations
Location: Vancouver
Posted on: September 1, 2024
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Job Description:
A company is looking for a Staff Layout Design Engineer.
Key Responsibilities:
Collaborate with circuit designers to understand complex custom
memory array designs
Design custom standard cell compliant transistor level layout
meeting PPA goals
Drive learning and optimization for physical effects of process
variation
Required Qualifications:
5+ years of experience in 7nm and smaller finFET nodes
Expertise in using industry standard CAD tools such as Cadence
Virtuoso
Experience with closing LVS, DRC, ERC, SRAM, other PVERF checks on
custom designs
Understanding of EMIR and mitigations
Linux or Unix proficiency
Keywords: VirtualVocations, Vancouver , Layout Design Engineer, Engineering , Vancouver, Washington
Click
here to apply!
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